(1) The Field of the Invention
The present invention relates to a direct current power source circuit and, more particularly, to a direct current power source circuit equipped with a series control device consisting of a voltage control power MOS-FET provided between an input terminal and an output terminal of the circuit.
(2) Description of the Related Art
A conventional direct current power source circuit using, for example, an N-channel power MOS-FET will be described below with reference to FIG. 1.
In FIG. 1, a voltage control power MOS-FET Q1 has a drain connected to an input terminal 2 and a source connected to an output terminal 3. It should be noted that a back gate of the power MOS-FET Q1 is connected to the source thereof. In FIG. 1, the reference numeral 4 represents a charge pump which is connected to a gate of the power MOS-FET Q1; Q5 represents a control output amplifying transistor of an N-channel MOS-FET whose drain is connected to a gate of the power MOS-FET Q1 and whose source is connected to a ground terminal 6; 7 and 8 represent voltage dividing resistors connected in series for setting an output voltage which are provided between the source of the power MOS-FET Q1 and the ground terminal 6; and 9 represents a differential amplifier for amplifying an error voltage, one input terminal (-) of which is connected to a reference voltage source 10 for supplying a reference voltage V.sub.REF, the other input terminal (+) of which is connected to an intermediate connection node a of the voltage dividing resistors 7 and 8, and an output terminal of which is connected to a gate of the control output amplifying MOS-FET Q5.
The operation of the conventional direct current power source circuit as arranged above is as follow. If an input voltage V.sub.IN applied to the input terminal 2 becomes a high level, the charge pump 4 operates to increase the gate voltage of the power MOS-FET Q1 to a voltage level higher than the input voltage V.sub.IN, whereby the power MOS-FET Q5 is turned to its ON state. As a result, at the output terminal 3, there is obtained an output voltage V.sub.OUT. At this time, the control output amplifying MOS-FET Q5 is operated in response to the output of the differential amplifier 9 on the basis of the reference voltage V.sub.REF of the reference voltage source 10, whereby the output voltage V.sub.OUT becomes proportional to the voltage dividing ratio of the voltage dividing resistors 7 and 8.
In the direct current power source circuit having circuit arrangements as above, however, if such a state wherein the input voltage V.sub.IN becomes lower than the output voltage V.sub.OUT resulting from a momentary voltage-off or voltage drop of the input voltage for any reason arises, a parasitic diode inherently existing between the source and drain of the power MOS-FET Q1 is electrically made conductive, so that a current will flow reversely, that is, from the output terminal 3 to the input terminal 2. In this case, if a memory backup circuit for supplying a backup voltage to a memory when the power source undergoes a momentary voltage-off for any reason is connected to the output terminal 3, the backup power charged in a secondary cell or a capacitor of the backup circuit is discharged by the reverse flow of the current caused by the parasitic diode as explained above, which leads to a problem that the backup voltage will be lowered. In addition, since the current also flows in the voltage dividing resistors 7 and 8, the backup voltage will further be lowered.